MSO3124E

Model Channels Record Length/ch(Analog / Digital) Vertical Resolution(Analog) Trigger(Analog / Digital) Electrical Validation(Protocol) MSO3124E 4  128 / 256 Mpts 8 bits  Group I / I --- MSO3124B  4 128 / 256 Mpts 8 bits Group I, II, Bus I / I, II --- MSO3124H  4 128 / 256 Mpts 16 bits Group I, II, Bus I / I, II, III  --- MSO3124V 4 128 / 256 Mpts 16 bits Group I, II, Bus I, II / I, II, III  I2C, I3C, SPI, UART,... Analog : 4CH, 1 GS/s S/R, 200 MHz bandwidthGroup I : Edge, Either, External, Falling, Rising, Video, WidthGroup II: Runt, Pattern/ State, Timeout, Transition, Setup/ Hold, B-Trigger, B-Event, WindowBus I : BiSS-C, CAN 2.0B/CAN FD, DALI, DP_Aux[1], I2C, I2S, LIN2.2, Modbus, Profibus, SENT, SPI, SVI2, UART UART(RS232), USB1.1, ...Bus II : SVI3[2], SVID[3][1] Optional DP_Aux adapter needed.[2] Upon request by user who is approved by AMD. SVI3 Bus Trigger / Decode are supported ONLY by MSO3124V.[3] Upon request by user who has signed CNDA with Intel. S