E12900 - SEMI E129 - Guide to Assess and Control Electrostatic Charge in a Semiconductor Manufacturing Facility

E12900 - SEMI E129 - Guide to Assess and Control Electrostatic Charge in a Semiconductor Manufacturing Facility

$187.00

The purpose of this Guide is to minimize the negative impact on productivity caused by static charge and electric fields in semiconductor manufacturing environments. It is a guide for establishing electrostatic compatibility in facilities used for semiconductor manufacturing. Electrostatic compatibility of production equipment is addressed in SEMI E78.   Electrostatic surface charge causes a number of undesirable effects in semiconductor manufacturing environments. Electrostatic discharge (ESD) damages both products and reticles. ESD events also cause electromagnetic interference (EMI), resulting in equipment malfunctions. Charged wafer and reticle surfaces attract airborne particles (electrostatic attraction [ESA]) and increase the defect rate. Charge on products can also result in equipment malfunction or product breakage. Operating problems and additional product defects due to static charge can have a negative impact on the cost of ownership (COO) of semiconductor manufacturing equipment (refer to SEMI E35).   Static-control methods can be incorporated in the factory design to reduce static charge to acceptable levels. This Guide can be used as a guide by semiconductor manufacturers and cleanroom facilities designers during the design of their facilities. Producers and users of the silicon wafers and reticles used in semiconductor manufacturing will also find it useful. The test methods described can be used to demonstrate the effectiveness of the static control methods. The end user will be able to use these test methods to verify compliance with a facility design specification after the facility is built or after design changes have been made, and to verify ongoing compliance as a part of factory maintenance procedures.   Semiconductor process technology continues to move toward smaller product geometries. Acceptable static charge levels continue to decrease with product feature size. This Guide provides recommendations to help assure that facility static charge limits are appropriate for the product being manufactured, referencing the feature sizes contained in the International Roadmap for Devices and SystemsTM (IRDSTM). The scope of this Guide is limited to providing recommended methods of measurement and guidance for the maximum recommended level of static charge on all facility surfaces including: Product, reticles, or their carriers; Facility construction materials and furniture; Personnel; Packaging and transport materials; and Equipment (through reference to SEMI E78).   This Guide presents a table of maximum recommended levels of static charge on products, reticles, carriers, and surfaces within the semiconductor production facility. The purpose is to: Reduce product, reticle, and equipment damage due to ESD; Reduce equipment lock-up problems due to ESD events; and Reduce the attraction of particles to charged surfaces.   This Guide references SEMI E78, SEMI E43, and other methods of measuring static charge as well as the performance parameters of static-control methods.   Referenced SEMI Standards (purchase separately) SEMI E33 — Guide for Semiconductor Manufacturing Facility Electromagnetic Compatibility SEMI E35 — Guide to Calculate Cost of Ownership (COO) Metrics for Semiconductor Manufacturing Equipment SEMI E43 — Guide for Electrostatic Measurements on Objects and Surfaces SEMI E78 — Guide to Assess and Control Electrostatic Discharge (ESD) and Electrostatic Attraction (ESA) for Equipment SEMI E163 — Guide for the Handling of Reticles and Other Extremely Electrostatic Sensitive (EES) Items Within Specially Designated Areas   Revision History SEMI E129-0222 (technical revision) SEMI E129-0912 (technical revision) SEMI E129-0709 (technical revision) SEMI E129-0706 (technical revision) SEMI E129-1103 (first published)

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